1. Field of the Invention
The present invention relates generally to processors, and more specifically, to a processor and processing method that direct execution to and from an arbitrary section of program code.
2. Background of the Invention
Processing systems are ubiquitous in both computing systems and embedded applications in consumer and industrial devices. Update of so-called read-only program code historically involved replacement of a read-only memory (ROM device) within the computer or other device containing the ROM code. Generally such devices are not field replaceable and return to a service center or factory is required. Masked ROMs are ROMs that are fabricated with a permanent program code and typically provide the lowest-cost and silicon area requirement for providing read-only memory within an integrated circuit.
More recently, electrically alterable read-only memories have been developed and techniques associated with those technologies implemented in software that permit a field modification to ROM devices, thus alleviating the need for factory service to upgrade the ROM program code.
However, several drawbacks are present with the use of electrically alterable memories, including, a limited number of write cycles to failure and limited fail-safe storage lifetimes. Most significantly, larger die areas and higher power requirements compared to masked ROM and the need to program the memories in conjunction with integration make the use of masked ROM preferable to electrically alterable ROM. Also, the technology requirements for electrically alterable ROM technologies is incompatible with some fabrication technologies or otherwise complicates the fabrication process, thus raising the cost when the electrically alterable ROM is included on a die with other circuits.
When program code in ROM is updated, generally only small portions of the full program code set are updated. Therefore, where the behavior of the ROM code is well-bounded, it is possible to use portions of the ROM code from an updated program stored in random access memory (RAM). However, the bounding requirement is that no path through the ROM code can possibly cause execution of any program code instruction that must be replaced in the updated version, severely limiting the flexibility of such ROM code re-use.
Existing processor architectures provide for directing execution of a processor to another memory location not consecutive with the last instruction, in the form of a call or jump (branch) instruction. The distinction between a call or jump instruction is that the call instruction saves the next program counter value, and upon encountering a return instruction, re-directs execution to the stored program counter value. A jump instruction is absolute in that there is no corresponding return instruction. In either case, unless a return instruction is already available at the end of a particular code section in ROM and unless the code in that section is bounded so as not to call or jump to other code that might execute a program instruction that is replaced in an update, existing processor architecture will not support the re-use of that particular code section.
Other known program instruction types provide for looping by executing a portion of program code repeatedly from a loop program instruction to an ending program instruction, with a count that may be specified within the instruction, via an operand or via a register. However, such program instructions do not provide for re-use of ROM program code, because such an instruction located in a particular memory will only loop program instructions immediately following the loop instruction in sequence.
Therefore, it is desirable to provide a processor and processing method for re-using arbitrary sections of program code. It is also desirable in general to extend a processor instruction set for more programming flexibility and program compactness.